Principal CPU Design Verification Engineer

Ventana Micro Systems is at the forefront of the two hottest trends that are revolutionizing the semiconductor industry: RISC-V and Chiplet Architecture. Check out our CEO talking with global tech analyst Patrick Moorhead about how Ventana combines the extensibility of RISC-V with chiplet technology to create customer-driven innovation for best-in-class solutions for the data center.

Ventana is well-funded and backed by some of the largest strategic investors in the industry with the goal of building best-in-class CPU cores for cloud, enterprise, 5G, and Edge computing. We invite you to join the revolution and contribute to one of the Hottest Semiconductor startups in the industry.

Principal CPU Design Verification Engineer:

We are seeking an experienced verification engineer to lead verification efforts of complex CPU and related subsystems based on the open-source RISC-V architecture. The right candidate will have deep technical expertise combined with exceptional leadership skills.

Responsibilities:

1. Lead end-to-end verification from complex CPU sub-units up to CPU clusters, partnering with architecture and design teams.
2. Develop verification infrastructure components including test-benches, scoreboards, and stimulus generators.
3. Develop and execute comprehensive verification plans for units and features.
4. Implement functional coverage models.
5. Debug designs in simulation, prototyping platforms, and silicon.
6. Continuously drive methodology improvements to improve efficiency.
7. Lead senior and junior engineers as a team to accomplish successful projects.

Minimum Qualifications:

1. Bachelors or Masters degree in electrical, computer engineering or related field.
2. BS+10 years or MS+12 years of industry experience successfully delivering CPU implementations.

Skills & Qualifications Required:

1. SystemVerilog verification development experience.
2. Testbench construction using UVM or analogous methodologies.
3. Scoreboards and stimulus generators for complex units.
4. Strong background in one or more common CPU ISAs: x86, ARM, MIPS, RISC-V, etc.
5. Strong background in processor coherency and MP programming.
6. Project ownership throughout the project lifecycle.
7. Demonstrated team leadership experience with outstanding communication skills.
8. Highly motivated self-starter with strong execution mindset and collaborative approach.
9. Post-silicon debug experience strongly preferred.

BASE SALARY RANGE

$115,000 TO $225,000 per year

EEOE
Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.

COVID-19
Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/business partners.

NOTICE: External Recruiters/ Staffing Agencies:
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